Minimig

The original Minimig prototype is based on the Xilinx Spartan-3 Starter Kit, the Amiga Original Chip Set is synthesized in the FPGA. Two printed circuit boards are attached via the FPGA kit expansion ports. The first one holds a Motorola 68000-type CPU. The second has a MultiMediaCard slot with a small PIC microcontroller acting as a disc controller that supports the FAT16 filesystem and does on-the-fly Amiga Disk File (ADF) decoding. VGA-+-PS2 (joystick etc.) | CPU FPGA Microcontroller Flashmemory | RAM The prototype was shown at an Amiga meet and loaded most Amiga programs, with some bugs. This prototype used verilog instead of VHDL on a PC using Xilinx Webpack software for code development.

As of the Minimig rev 1.0 board: • Xilinx Spartan-3 400k gate (XC3S400-4PQ208C) FPGA using 82% capacity. • Freescale MC68SEC000, 3.3V, at 7.09379 MHz. However, there's no 'E' clock, MOVE sr,<EA> is privileged and there is no real replacement instruction. • Amiga Chip RAM bus and slow RAM are merged into a single synchronous bus running at 7.09379 MHz. • 2 MB 70 ns asynchronous SRAM organised as 2 × 524,288 × 16-bit banks. • PIC 18LF252-I/SP (An alternative is Atmel AVR) implements a FAT16 disk layout and handles loading of FPGA configuration and Kickstart. This simulates a floppy disk to the Amiga by encoding on the fly from ADF files. • MultiMediaCard to load FPGA configuration, kickstart and software for the implemented computer. • 3 LEDs to display disk activity, main power, and Amiga power-up status. Amiga power-up status LED will also change intensity to show audio filter status. • Video DAC consists of 4 resistors for each color red, green, blue (4 bits/color), and output via VGA connector. • Audio from an 8-bit sigma-delta converter with dither and 2nd-order analogue filter. • +5 VDC main power (~200 mA).

• Spare 3x generic I/O from the FPGA (GPIO) • JTAG for programming chips (TMS, TDI, TDO, TCK). • RS232 serial port • 2x Joystick of Atari 2600 DE9M type • DE15F VGA video (which can output PAL-compatible signals to connect to SCART) • MMC Flash memory card slot • PS/2 connector Keyboard + Mouse • 3.5 mm audio jack • +5V DC 2.1 mm cylindrical DC plug power supply inlet

• Motorola 68000 type CPU • Hardware OCS and ECS, PAL and NTSC video switchable via OSD. • 512 KB SRAM for Kickstart used as ROM. • 0.. 1536 KB Slow RAM expansion (originally 512 KB) • 512.. 2048 KB Chip RAM (originally 1024 KB) • On-screen display offers selection of ADF disk images from the SD/MMC card using the keyboard or a joystick.

• Date — Event • 2005-03-06 — Verilog source coding started. • 2005-12-05 — Project announced. • 2006 Spring — Verilog source completed. • 2006-06-11 — Screenshot of schematic for board v1.0 published. • 2006-10-15 — Schematic for board v1.0 completed. • 2007-06-xx — Source code original scheduled release date (postponed). • 2007-07-04 — Last source edit (core). • 2007-07-24 — Minimig source code released on the official website.

• It lacks a binary copy of the AmigaOS kickstart • The current firmware for loading ROM and floppy images is limited to a single root directory and 8.3 filenames.

Possible future developments include: • A faster CPU, ECS chipset, AGA graphics (new FPGA board is required), hard disk, Ethernet, small RISC-Core for enhanced AROS functions, etc. • Use of a free kickstart replacement (e.g. AROS). • A networked version would eliminate the need for swapping flash memories.

On 3 September 2008, a new FPGA core enables floppy read/write support, as well as some chipset improvements.

On 22 December 2008, a replacement board that fits into the PIC (MCU) controller socket was announced. It makes hard drive, 4x floppy disk, and write support possible. The FPGA core is the same for the new ARM and PIC firmware but only the ARM has enough resources to support four drives. The PIC only supports two. The upgrade also allows an increase of the CPU speed from 7.09 to 49.63 MHz with a 4 KB zero wait state CPU cache. However, it requires an FPGA core to actually carry it out (which works with the 16 MHz 68SEC000 chips). The hard drive support is available by a virtual A600/A1200 style GAYLE parallel ATA interface. Up to 551 kbit/s is possible with a minor hardware modification. Otherwise, only ~300 kbit/s is possible.

The Minimig port for the MiST board supports USB peripherals, including USB keyboard and USB mouse as well as a physical MIDI interface.

On 22 December 2008, a modification of the original PCB, by piggybacking another set of SRAM chips, enables up to 4 MiB of RAM in total.

The Minimig port for the MiSTer board was updated to support major AGA features, allowing it to run many AGA games. A binary release, as well as the full source code, is available under GPL. An unreleased Minimig core has been upgraded with AGA support and extended to support at least 50 MiB of chip memory on the prototype Replay board designed by Mike Johnson at FPGA Arcade.

Jeri Ellsworth, who designed the C64 Direct-to-TV Commodore 64 on a chip (ASIC), had a working Amiga on a chip prototype in 2003. Except for the 68000 processor and disk interface, everything was emulated inside an FPGA. However, the project was never finished or turned into an ASIC. Illuwatar, a small private hardware designer in Sweden, implemented a Mini-ITX form-factor version of the Minimig under an open source design license. This hardware version fits in standard Mini-ITX cases and has dimensions of 17 cm x 17 cm. Connecting ports in this version were moved to the back of the mainboard to comply with Mini-ITX requirements. On 9 Feb 2008, ACube Systems announced the availability of finished Minimig v1.1 boards. Wolfgang Förster has completed the Suska project, which is an Atari ST-on-FPGA. Inspired by Minimig, Till Harbaum invented MIST, an open FPGA-based implementation of Atari ST and Amiga intended to have a low price and be easily built at home. Unlike Minimig, the 68000 CPU is not present as a physical device but is implemented inside the FPGA. Inspired by MIST, Alexey Melnikov invented MiSTer, an FPGA-based implementation of Atari ST and Amiga, based on a commercial board by Terasic: DE10-nano. There are at least five so-called daughter boards that enhance the capabilities of MiSTer. Vampire V4 Standalone, released by Apollo Team in 2019, provides ECS/AGA chipset re-implementation, plus 68080 CPU and SAGA core, also using a field-programmable gate array (FPGA).